Butted contacts have been used for contacting n-type diffusion to ground or a p-type diffusion to Vdd power supply. Butted contacts provide a relatively dense contacting method. A method typically employed for creating butted contacts involves placing opposite diffusion blocks within the same active area, whereby the diffusion blocks do not overlap. However, this technique requires sufficient real estate in order to guarantee that both diffusion types are reliably created, thereby taking up increased area.
Furthermore, the substrate well contact diffusion, when butted against a FET diffusion, tends to create some degradation in transistor performance as the well contact diffusion gets closer and approaches the FET gate edge. It is believed that dopant diffusion of opposite species type from the substrate or well contact causes this degradation.
Accordingly, it would be desirable to provide a butted contact that requires less real estate along with eliminating or at least significantly reducing contamination of the device by dopant diffusion from the butted contact.